1. Field of the Invention
The present invention relates to semiconductor device and manufacturing method thereof, and particularly to a semiconductor device having Σ-shaped embedded source and drain regions and a manufacturing method thereof.
2. Description of the Related Art
In CMOS devices, techniques to embed SiGe have been proposed to increase compressive stress in the channel region of a PMOS device, so as to improve carrier mobility, wherein source and drain regions are formed from embedded SiGe to apply stress to the channel region.
In order to enhance the effect of applying stress, a procedure for forming a Σ-shaped recess for filling with SiGe is further provided.
FIG. 1 schematically illustrates a cross-sectional view of a Σ-shaped recess formed in a substrate. In the cross-sectional view, a “Σ” shape is formed through the surface 130 of the substrate 100, comprising the upper portion 140, a lower portion 150 of the recess sidewall and the recess bottom 180 indicated by the extending line 160 (denoted by dotted line).
The Σ-shaped recess shown in FIG. 1 can be formed by orientation selectivity wet etching.
For example, the surface of substrate 100 can be a (001) crystal plane. As shown in FIG. 2A, first, a U-shaped recess 210 is formed in the substrate through, for example, dry etching. The bottom of recess 210 is also a (001) crystal plane, while the sidewall may be a (110) crystal plane.
Next, a wet etchant having orientation selectivity, such as an etchant comprising Tetramethyl ammonium hydroxide (TMAH), is utilized to etch the substrate 100 from the U-shaped recess 210. During the etching process, the etching rate of <111> orientation is less than that of other orientation. Thereby, the U-shaped recess 210 is etched into a diamond-shaped recess 215 as shown in FIG. 2B. The location of the original U-shaped recess 210 is shown by the dotted line in FIG. 2B. The sidewall of the recess 215 has an upper portion 240 and a lower portion 250, which substantially have (111) and (11 1) orientation, respectively.
However, since the etching rate of <100> and <110> orientation is larger than that of <111> orientation, the bottom of the recess 215 is liable to be overetched, causing the lower portion 250 of the opposite sidewalls of the recess 215 to intersect with each other. Therefore, the bottom of the recess 215 is cuspate but not flat as the result of anisotropic etching.
If the recess 215 has a cuspate bottom, high quality SiGe cannot be obtained when performing epitaxial growth of SiGe in the recess 215.